Prof. James C. M. Hwang (黃正民 教授)
Name of the speaker: James C. M. Hwang
Position: Professor
Company/Organization: Lehigh University
Nationality: USA

The Title of Speech: Selected Examples of Past, Present and Future Trends in
Manufacturing of Semiconductor Nanodevices
Biography of the Speaker: Dr. James Hwang is Professor of Electrical Engineering at Lehigh University. He graduated with a B.S. degree in Physics from National Taiwan University in 1970, and completed M.S. (1973) and Ph.D. (1976) studies in Materials Science and Engineering at Cornell University. After twelve years of industrial experience at IBM, AT&T, GE, and GAIN, he joined Lehigh in 1988. He cofounded GAIN and QED; the latter became a public company (IQE). He had been a visiting professor at Marche Polytechnic University in Italy, Nanyang Technological University in Singapore, Shanghai Jiao Tong University, East China Normal University, and University of Science and Technology in China. Most recently, he was a Program Officer for GHz-THz Electronics at the Air Force Office of Scientific Research. He is a Life Fellow of the Institute of Electrical and Electronic Engineers. He has published more than 300 refereed technical papers with the impact factor h = 37 according to Google Scholar. He has been granted eight U. S. patents. His current research interest includes electrical sensing of biological cells and molecules, graphene-like two-dimensional atomic-layer materials and devices, and radio-frequency micro-electromechanical systems.
Abstract of Speech:
image.png The first example will be based on the historical development of molecular beam epitaxy (MBE) for compound-semiconductor nanodevices. It was mentioned [1] as early as 1982 that “despite the numerous examples of MBE-based devices, MBE has so far remained largely a research tool. In order to make MBE suitable for development and production of devices, it is necessary to solve problems such as purity, uniformity and throughput. Therefore, a joint task was undertaken by Bell Labs and Varian Associates to design and manufacture an advanced MBE system which will enable us to address these problems.” (The same can be said about many current nano-manufacturing technologies by replacing “MBE” with, e.g., “nanoimprint”.) The joint task resulted in the Varian GEN-II MB E system (Fig. 1) which became the industry workhorse. Its success is evidenced by successive developments of GEN-20, GEN-200 and GEN-2000 systems by Veeco, Varian’s successor, without any GEN-III system. (There was never any GEN-I system as most MBE systems earlier were homemade.) The success underscores the importance of engaging an equipment supplier in the development of a manufacturable process. It also underscores the role of Bell Labs in democratizing technology. As a monopoly, Bell Labs was not concerned about competition and would freely license the patents [2], [3], and Varian was free to duplicate the system for commercial sale, which incentivized Varian in the joint development.
image1.png The second example will be based on the current trend of using silicon CMOS back-end-of-line (BEOL) processes for non-silicon transistors, micro-electromechanical systems, sensors, etc., which gives CMOS ICs additional functionality “more than Moore”. While scaling of transistors such as FinFETs is glamorous, the development of BEOL processes for on-chip multilevel (10-15 levels currently) interconnects is equally challenging and important. Considering a chip can have as many transistors as people on earth, the ability to allow the billions of transistors to communicate with each other reliably and efficiently is truly an accomplishment. It is likely that even after silicon transistors cease to be used “beyond Moore”, silicon wafers will continue to be used as a nano-manufacturing platform especially with BEOL processes. To take advantage of BEOL processes, we have designed a massive array of transistor electrodes, such as nanometer-sized gates, to be manufactured by a state-of-the-art CMOS foundry on 200-mm-diameter high- resistivity silicon wafers (Fig. 2). The wafers are diced into 25 nm x 15 nm chips for overcoating at many other places with non-silicon channel materials such as graphene and other two-dimensional (2D) atomic-layer materials to complete the transistor fabrication. These highly uniform and reproducible devices should allow systematical investigation of 2D materials and greatly accelerate the development of 2D devices, which are currently fabricated mostly by using direct-write electron beam lithography individually. This can potentially democratize the development of 2D devices just as the so-called “Scotch tape” technique democratized the research of 2D materials. Fig. 3. Growth of phosphorene layers by chemical vapor transport [7].
image3.pngThe third example will be based the emerging trend for large-area growth of phosphorene, a new 2D material similar to graphene, but has an intrinsic and sizable bandgap for efficient electronics [4]. Over the past decade, graphene has attracted a lot of attention because its electron mobility is much higher than that of silicon. However, it turned out graphene could not be used for efficient electronics because it lacked a bandgap and any attempt to induce a bandgap in graphene degrades its mobility. The mobility of phosphorene is not as high as that of graphene, but still higher than that of silicon. Therefore, phosphorene is a viable candidate to replace silicon in ultra-thin-body, ultra-high-speed and ultra-low-power-consumption MOSFETs. In just a couple of years, very promising performance and reliability of phosphorene MOSFETs have been demonstrated [5]-[6]. However, all phosphorene MOSFETs to date have been fabricated on flakes transferred by the “Scotch tape” technique, which are only a few microns in size. Nevertheless, encouraged by the promising device performance, efforts are underway to prepare uniform and large-area phosphorene by liquid exfoliation, pulsed laser deposition, chemical vapor transport, and chemical vapor deposition (Fig. 3) [7]. Although interesting preliminary results have been obtained, it is too early to predict which technique will become the manufacturing technique for phosphorene devices. Nevertheless, these developments underscore the importance of early demonstration in a “quick and dirty” way of promising device performance, so that enough people are incentivized to help develop a manufacturing technique.
[1] J. C. M. Hwang, J. V. DiLorenzo, P. E. Luscher, and W. S. Knodle, "Application of molecular beam epitaxy to III V microwave and high speed device fabrication," Solid State Technol., vol. 25, pp. 166−169, Oct. 1982.
[2] J. C. Hwang, “III-V based semiconductor devices and a process for fabrication,” U.S. Patent 4 493 142, Jan. 15, 1985.
[3] J. C. Hwang, "Method of substrate heating for deposition processes," U. S. Patent 4 514 250, Apr. 30, 1985.
[4] K. Xiong, X. Luo, and J. C. M. Hwang, “Phosphorene FETs – Promising transistors based on a few layers of phosphorus atoms,” in Dig. IEEE MTT-S IMWS-AMP, Suzhou, China, Jul. 2015, pp. 1−3.
[5] X. Luo, Y. Rahbarihagh, J. C. M. Hwang, H. Liu, Y. Du, and P. D. Ye, “Temporal and thermal stability of Al2O3-passivated phosphorene MOSFETs,” IEEE Electron Device Lett., vol. 35, no. 12, pp. 1314−1316, Dec. 2014.
[6] X. Luo, K. Xiong, J. C. M. Hwang, Y. Du, and P. Ye, “Continuous-wave and transient characteristics of phosphorene microwave transistors,” in IEEE MTT-S Int. Microwave Symp. Dig., San Francisco, CA, May 2016, pp. 1−3.
[7] J. B. Smith, D. Hagaman, and H. F. Ji, “Growth of 2D black phosphorus film from chemical vapor deposition,” Nanotechnology, vol. 27, no. 21, pp. 215602-1–215602-8, Apr. 2016.